Publications – 2008

I. Meric, N. Baklitskaya, P. Kim, and K. L. Shepard, “RF performance of top-gated, zero-bandgap graphene field-effect transistors,” International Electron Devices Meeting, 2008.

Abstract

We present the first experimental high-frequency measurements of graphene field-effect transistors (GFETs), demonstrating an fT of 14.7 GHz for a 500-nm-length device. We also present detailed measurement and analysis of velocity saturation in GFETs, demonstrating the potential for velocities approaching 108 cm/sec and the effect of an ambipolar channel on current-voltage characteristics.

K. L. Shepard, I. Meric, and P. Kim, “Characterization and modeling of graphene field-effect devices,” Proceedings of the International Conference on Computer-Aided Design, 2008, pp. 406-411.

Abstract

The novel electronic properties of graphene, including a linear energy dispersion relation and purely two-dimensional structure, have led to intense research into possible applications of this material in nanoscale devices. In this paper, we review the unique electronic properties of graphene that give it the potential for high-frequency electronic applications. We then present the latest results on the current- voltage characteristics of top-gated graphene FETs. These devices show unique characteristics related to the ambipolar nature of the graphene channel. In addition, the devices show very high saturation velocities, suggesting the possibility for superior high frequency performance. Our initia al devices have transconductances as high as 150 µS/µm despite low on-off current ratios, making the devices very suitable for analog/RF applications

D. E. Schwartz, E. Charbon, and K. L. Shepard, “A Single-Photon Avalanche Diode Array for Fluorescence Lifetime Imaging Microscopy,” IEEE Journal of Solid-State Circuits, 43, 11, (November 2008), pp. 2546-2557.

Abstract

We describe the design, characterization, and demonstration of a fully integrated single-photon avalanche diode (SPAD) imager for use in time-resolved fluorescence imaging. The imager consists of a 64-by-64 array of active SPAD pixels and an on-chip time-to-digital converter (TDC) based on a delay-locked loop (DLL) and calibrated interpolators. The imager can perform both standard time-correlated single-photon counting (TCSPC) and an alternative gated-window detection useful for avoiding pulse pile-up when measuring bright signal levels. To illustrate the use of the imager, we present measurements of the decay lifetimes of fluorescent dyes of several types with a timing resolution of 350 ps.

N. Lei, B. O. Watson, J. N. MacLean, R. Yuste, and K. L. Shepard, “A 256-by-256 CMOS microelectrode array for extracellular stimulation of acute brain slices” Proceedings to the International Solid-State Circuits Conference, 2008

Abstract

Extracellular stimulation of neurons is an important tool in investigating the function of the nervous system. Optical techniques, based on voltage- and calcium-sensitive dyes or photouncaging, along with multi-photon fluorescent microscopy have proven very successful in imaging activity in slices and in vivo. However, studies have been limited by the ability to stimulate different regions of tissue with enough spatial resolution and throughput. Traditional stimulation is accomplished with passive multielectrode arrays (MEAs) or bipolar electrodes. In both cases, a relatively small number of stimulation sites with coarse spatial resolution are possible. While there has been recent work on the development of CMOS chips for extracellular recordings of cultured neurons or slices on planar electrodes, the focus of this work is on stimulation and achieving stable electrical interfaces between acute slices and a high-density active CMOS MEA. As brain slices preserve many synaptic connections, they are ideal preparations to study neuronal microcircuits in vitro. Active stimulation technologies should enable detailed “reverse engineering” of neural circuitry.

David Schwartz, Ping Gong, and K. L. Shepard, “Time-resolved Forster-resonance-energy-transfer DNA assay on an active CMOS microarray,” Biosensors and Bioelectronics 24, 3 (November 15, 2008), pp. 383-390

Abstract

We present an active oligonucleotide microarray platform for time-resolved F ¨ orster-resonance-energy transfer (TR-FRET) assays. In these assays, immobilized probe is labeled with a donor fluorophore and analyte target is labeled with a fluorescence quencher. Changes in the fluorescence decay lifetime of the donor are measured to determine the extent of hybridization. In this work, we demonstrate that TR-FRET assays have reduced sensitivity to variances in probe surface density compared with standard fluorescence-based microarray assays. Use of an active array substrate, fabricated in a standard complementarymetal- oxide-semiconductor (CMOS) process, provides the additional benefits of reduced system complexity and cost. The array consists of 4096 independent single-photon avalanche diode (SPAD) pixel sites and features on-chip time-to-digital conversion.We demonstrate the functionality of our system by measuring a DNA target concentration series using TR-FRET with semiconductor quantum dot donors.

I. Meric, M. Y. Han, A. F. Young, B. Ozyilmaz, P. Kim, K. L. Shepard, “Current saturation in zero-bandgap, top-gated graphene field-effect transistors,” Nature Nanotechnology 3, pp. 654-59, 2008.

Abstract

The novel electronic properties of graphene1–4, including a linear energy dispersion relation and purely two-dimensional structure, have led to intense research into possible applications of this material in nanoscale devices. Here we report the first observation of saturating transistor characteristics in a graphene field-effect transistor. The saturation velocity depends on the charge-carrier concentration and we attribute this to scattering by interfacial phonons in the SiO2 layer supporting the graphene channels5,6. Unusual features in the current–voltage characteristic are explained by a field-effect model and diffusive carrier transport in the presence of a singular point in the density of states. The electrostatic modulation of the channel through an efficiently coupled top gate yields transconductances as high as 150 mS mm21 despite low on–off current ratios. These results demonstrate the feasibility of two-dimensional graphene devices for analogue and radio-frequency circuit applications without the need for bandgap engineering.

P. M. Levine, P. Gong, R. Levicky, and K. L. Shepard, “Active CMOS sensor array for electrochemical biomolecular detection,” IEEE Journal of Solid-State Circuits, 43, 8 (August, 2008), pp. 1859-1871

Abstract

Electrochemical sensing of biomolecules eliminates the need for the bulky and expensive optical instrumentation required in traditional fluorescence-based sensing assays. Integration of the sensor interface electrodes and active electrochemical detection circuitry on a CMOS substrate miniaturizes the sensing platform, enhancing its portability for use in point-of-care applications, while enabling the high-throughput, highly parallel analysis characteristic of traditional microarrays. This paper describes the design of a four-by-four active sensor array for multiplexed electrochemical biomolecular detection in a standard 0.25- m CMOS process. Integrated potentiostats, comprised of control amplifiers and dual-slope analog-to-digital converters, stimulate the electrochemical cell and detect the current flowing through the on-chip gold electrodes at each sensor site that results from biomolecular reactions occurring on the chip surface. Post-processing steps needed to fabricate a biologically-compatible surface-electrode array in CMOS that can withstand operation in a harsh electrochemical environment are also described. Experimental results demonstrating the proper operation of the active CMOS array for biomolecular detection include cyclic voltammetry of a reversible redox species, DNA probe density characterization, as well as quantitative and specific DNA hybridization detection.

B. Calhoun, Y. Cao, X. Li, K. Mai. L. Pileggi, R. A. Rutenbar, and K. L. Shepard, “Digital circuit design challenges and opportunities in the era of nanoscale CMOS” Proceedings of the IEEE, 96, 2 (February, 2008) pp. 343-365

Abstract

Well-designed circuits are one key “insulating” layer between the increasingly unruly behavior of scaled complementary metal–oxide–semiconductor devices and the systems we seek to construct from them. As we move forward into the nanoscale regime, circuit design is burdened to “hide” more of the problems intrinsic to deeply scaled devices. How this is being accomplished is the subject of this paper. We discuss new techniques for logic circuits and interconnect, for memory, and for clock and power distribution. We survey work to build accurate simulation models for nanoscale devices. We discuss the unique problems posed by nanoscale lithography and the role of geometrically regular circuits as one promising solution. Finally, we look at recent computer-aided design efforts in modeling, analysis, and optimization for nanoscale designs with ever increasing amounts of statistical variation.