Ko-Tao Lee, Can Bayram, Daniel Piedra, Edmund Sprogis, Hariklia Deligianni, Balakrishnan Krishnan, George Papasouliotis, Ajit Paranjpe, Eyal Aklimi, Ken Shepard, Tomás Palacios, and Devendra Sadana. GaN Devices on a 200 mm Si Platform Targeting Heterogeneous Integration. IEEE Electron Device Letters (Volume: 38, Issue: 8, Aug. 2017 ).
GaN-based high electron mobility transistors (HEMTs) were fabricated on 200-mm silicon-oninsulator (SOI) substrates possessing multiple crystal orientations. These SOI substrates have the Si (100)-SiO2- Si (111) structure, which allows Si (111) to be exposed below the buried oxide to enable GaN epitaxial growth adjacent to Si (100). The current collapse in GaN HEMTs of < 150 × 150 µm2 patterns is 2%–6%, which is remarkably lower than the devices on blanket materials. We believe that stress relaxation resulting from substrate patterning contributes to the reduction of current collapse. By creating small GaN patterns on a larger diameter Si wafer, co-integration of GaN with Si technology may be possible. [/av_toggle] [/av_toggle_container] [av_hr class='invisible' height='2' shadow='no-shadow' position='center' custom_border='av-border-thin' custom_width='50px' custom_border_color='' custom_margin_top='30px' custom_margin_bottom='30px' icon_select='yes' custom_icon_color='' icon='ue808' font='entypo-fontello' admin_preview_bg='' av_uid='av-2lw3bw']