I. Meric, V. Caruso, R. Caldwell, J. Hone, K. L. Shepard, and S. J. Wind, “Hybrid carbon nanotube-silicon CMOS circuit” Journal of Vacuum Science and Technology B, 25, 6 (Nov/Dec, 2007), pp. 2577-2580

Abstract

A hybrid technology is presented that combines carbon nanotube field-effect transistors (CNFET) with conventional, silicon-based complementary metal oxide semiconductor (CMOS) technology. The fabrication involves the chemical vapor deposition growth and optical characterization of carbon nanotubes, which are then transferred with lithographic precision onto a commercially fabricated CMOS substrate. In this manner, CNFET devices are fabricated on top of the interconnection network of the CMOS chip, providing a three-dimensional integration of active devices, “sandwiching” wiring, and passives. As a demonstration of this approach, a simple hybrid CNFET/CMOS inverter is fabricated and tested.